hitfet ? bsp 75 semiconductor group page 1 of 9 2000-05-19 smart lowside power switch features ? logic level input ? input protection (esd) ? thermal shutdown (with restart) ? overload protection ? short circuit protection ? overvoltage protection ? current limitation application ? all kinds of resistive, inductive and capacitive loads in switching applications ? c compatible power switch for 12 v and 24 v dc applications ? replaces electromechanical relays and discrete circuits general description n channel vertical power fet in s mart p ower t echnology. fully protected by embedded protection functions. protection overvoltage drain in esd hitfet source 1 3 over- protection temperature short circuit protection + limitation v bb short circuit protection load 2 dv/dt limitation 4 m current pin symbol function 1 in input 2 drain output to the load 3 source ground tab substrate must be connected to pin 3 product summary continuous drain source voltage v ds 55 v on-state resistance r ds(on) 550 m ? current limitation i d(lim) 1a nominal load current i d(nom) 0.7 a clamping energy e as 550 mj
hitfet ? bsp 75 semiconductor group page 2 2000-05-19 maximum ratings at t j =25c unless otherwise specified parameter symbol values unit continuous drain source voltage (overvoltage protection see page 4) v ds 55 v drain source voltage for short circuit protection v ds 32 v load dump protection v loaddump = u p + u s ; u p =13.5 v r i 1 ) =2 ? ; t d =400ms; in=low or high (8v) r l =50 ? r i =2 ? ; t d =400ms; in=high (8v) r l =22 ? v loaddum p 2 ) 80 47 v continuous input voltage v in -0.2 ... +10 v peak input voltage v in -0.2 ... +20 v operating temperature range storage temperature range t j t stg -40 ...+150 -55 ...+150 c power dissipation (dc) p tot 1.8 w unclamped single pulse inductive energy i d(iso) = 0.7 a e as 550 mj e lectro s tatic d ischarge voltage (human body model) according to mil std 883d, method 3015.7 and eos/esd assn. standard s5.1 - 1993 v esd 4000 v din humidity category, din 40 040 e iec climatic category, din iec 68-1 40/150/56 thermal resistance junction soldering point: junction - ambient 3 ) : r thjs r thja 10 70 k/w 1 ) r i =internal resistance of the load dump test pulse generator ld200 2 ) v loaddump is setup without dut connected to the generator per iso 7637-1 and din 40 839. 3 ) device on epoxy pcb 40mm x 40 mm x 1.5mm with 6cm 2 copper area for pin 4 connection
hitfet ? bsp 75 semiconductor group page 3 2000-05-19 electrical characteristics parameter and conditions symbol values unit at t j = 25 c, unless otherwise specified min typ max static characteristics drain source clamp voltage i d = 10 ma t j =-40...+150c: v ds(az) 55 -- 70 v off state drain current v in = 0 v, v ds = 32 v t j =-40...+150c: i dss -- -- 5 a input threshold voltage i d = 10 ma v in(th) 22.5 3 v input current normal operation, i d< i d(lim) : v in = 5 v current limitation mode, i d =i d(lim) : after thermal shutdown, i d =0 a: i in(1) i in(2) i in(3) -- -- 1000 100 200 1500 200 300 2000 a on-state resistance i d = 0.7 a, v in = 5 v t j =25c: t j =150c: r ds(on) -- -- 550 850 675 1350 m ? on-state resistance i d = 0.7 a, v in = 10 v t j =25c: t j =150c: r ds(on) -- -- 475 750 550 1000 m ? nominal load current v bb = 12 v, v ds = 0.5 v, t s = 85c t j < 150c i d(nom) 0.7 -- -- a current limit v in = 10 v, v ds = 12 v i d(lim) 11.51.9 a dynamic characteristics turn-on time v in to 90% i d : r l = 22 ? , v in = 0 to 10 v, v bb = 12 v t on -- 10 20 s turn-off time v in to 10% i d : r l = 22 ? , v in = 10 to 0 v, v bb = 12 v t off -- 10 20 s slew rate on 70 to 50% v bb : r l = 22 ? , v in = 0 to 10 v, v bb = 12 v -d v ds /dt on -- 4 10 v/ s slew rate off 50 to 70% v bb : r l = 22 ? , v in = 10 to 0 v, v bb = 12 v d v ds /dt off -- 4 10 v/ s
hitfet ? bsp 75 semiconductor group page 4 2000-05-19 parameter and conditions symbol values unit at t j = 25 c, unless otherwise specified min typ max protection functions thermal overload trip temperature t jt 150 165 -- c thermal hysteresis ? t jt -- 10 -- k unclamped single pulse inductive energy i d(iso) =0.7 a, v bb =32 v t j =25 c t j =150 c e as 550 200 -- -- -- -- mj inverse diode continuous source drain voltage v in = 0 v, -i d = 2*0.7 a v sd -- 1 -- v circuit description the bsp 75 is a monolithic power switch in smart power technology (spt) with a logic level input, an open drain dmos output stage and integrated protection functions. it is designed for all kind of resistive and inductive loads (relays, solenoid) in automotive and industrial ap- plications. protection functions ? overvoltage protection: an internal clamp limits the output voltage at v ds(az) (about 63 v) when inductive loads are switched off. ? current limitation: by means of an internal current measurement the drain current is lim- ited at i d(lim) (1.4 - 1.5 a typ.). if the current limitation is active the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. this opera- tion leads to an increasing junction temperature until the overtemperature threshold is reached. ? overtemperature and short circuit protection: this protection is based on sensing the chip temperature. the location of the sensor ensures a fast and accurate junction tem- perature detection. overtemperature shutdown occurs at minimum 150 c. a hysteresis of typ. 10 k enables an automatical restart by cooling. the device is esd protected according human body model (4 kv) and load dump protected (see maximum ratings).
hitfet ? bsp 75 semiconductor group page 5 2000-05-19 block diagram terms hitfet in d v in i d v ds 1 i in s v bb r l 2 3 input circuit (esd protection) in esd-zd i source esd zener diodes are not designed for dc current. inductive and overvoltage output clamp hitfet v z d s v in t v ds v bb v ds(az) turn on into overload or short circuit v in t i d i d(lim) shut down by overtemperature and restart by cooling. current internally limited at i d(lim) .
hitfet ? bsp 75 semiconductor group page 6 2000-05-19 maximum allowable power dissipation p tot = f (t c ) p tot [w] 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 0 25 50 75 100 125 150 t c [c] on-state resistance r on = f (t j ); i d = 0.7 a; v in = 5 v r on [m ? ] 0 200 400 600 800 1000 1200 1400 -50 -25 0 25 50 75 100 125 150 max. typ. t j [c] on-state resistance r on = f (t j ); i d = 0.7 a; v in = 10 v r on [m ? ] 0 100 200 300 400 500 600 700 800 900 1000 -50 -25 0 25 50 75 100 125 150 max. typ. t j [c] typ. input threshold voltage v in(th) = f (t j ); i d = 10 ma; v ds = 12 v v in(th) [v] 0 0.5 1 1.5 2 2.5 3 -50 -25 0 25 50 75 100 125 150 t j [c]
hitfet ? bsp 75 semiconductor group page 7 2000-05-19 typ. on-state resistance r on = f (v in ) i d = 0.7 a; t j = 25c r on [m ? ] 0 500 1000 1500 2000 0246810 v in [v] typ. short circuit current i d(sc) = f (v in ); v ds =12v, t j = 25c i d(sc) [a] 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0246810 v in [v] typ. current limitation i d(lim) = f (t j ); v ds =12v, v in = 10v i d(lim) [a] 1 1.1 1.2 1.3 1.4 1.5 -50 -25 0 25 50 75 100 125 150 t j [c] transient thermal impendance z thjc = f (t p ) parameter: d=t p /t z thjc [k/w] 1e-2 1e-1 1e+0 1e+1 1e+2 1e-6 1e-5 1e-4 1e-3 1e-2 1e-1 1e+0 1e+1 1e+2 1e+3 1e+4 0 0.005 0.01 0.02 0.5 0.2 0.1 0.05 t t p t p tot d= t p [s]
hitfet ? bsp 75 semiconductor group page 8 2000-05-19 application examples: status signal of thermal shutdown by monitoring input current d s in c v bb hitfet v in r st v in thermal shutdown ? v c
hitfet ? bsp 75 semiconductor group page 9 2000-05-19 package and ordering code all dimensions in mm package ordering code p-sot223-4-7 q67060-s7200-a2 definition of soldering point with temperature t s : upper side of solder edge of device pin 4. pin 4
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